Monte Cimone, RISC-V turns to supercomputers with an all-Italian cluster

E4 Computer Engineering presentMont CimoneA groups aimed at enabling the co-development of high-performance scientific and engineering applications and its supporting software stack on ISA RISC-V.

Monte Cimone the first cluster based on ISA RISC-Vspecifically designed, built and validated for activities aimed at enabling it use in the HPC ecosystemhaving as its main objective an operating environment.

The development of the project was monitored by the DEI-UNIBO(Department of Electrical, Electronic and Computer Engineering “Guglielmo Marconi” of the University of Bologna) which contributed to the definition of the system architecture, the development of the software stack and the integration of Examon into the data center automation environment, and CINECAfirst Italian supercomputing center, which has deployed high-performance mathematical libraries (OpenBLAS, FFTW, Netlib-LAPACK, Netlib-scaLAPACK) and scientific applications (HPL, Quantum Espresso).

cluster monte cimone risc v 15 12 2021

The Monte Cimone project enables developers to test and validate scientific and engineering workloads in a rich software stack, including development tools, libraries for message-passing programming, BLAS, FFT, drivers for HS networks and OR I/O devices.

“The continuous dialogue between E4, DEI-UNIBO and CINECA has enabled Monte Cimone to achieve such a level of stability and reliability, both in terms of hardware and software, to perform various workflows (e.g. Quantum Espresso, OpenFOAM) and enable the porting of additional applications,” reads a press release.”RISC-V a very promising ISA for HPCso much so that the European Processor Initiative will use an accelerator based precisely on this specification”.

Monte Cimone is currently in the final validation phase at DEI-UNIBO and a similar architecture, although on a smaller scale, is located at the E4 R&D lab for further development. Once validated, Monte Cimone will be transferred to CINECA for further testing and for integration into the exascale class computing environment.

Monte Cimone is based on 6 dual card 1U servers inside which there are mini-ITX motherboards on which there is space SiFive Freedom U740 SoC, 16 GB of memory, one Gigabit Ethernet and four USB 3.2 Gen 1, plus PCIe 3.0 x8 connectivity. The storage part consists of a 1TB M.2 2280 NVMe SSD for the operating system, while a micro SD is used for UEFI boot. Two 250W power supplies and cooling fans complete the package.

“I am extremely excited about the results we have achieved with Monte Cimone, which demonstrate remarkable maturity of the RISC-V software stack and tools for HPC. I think RISC-V based HPC machines are not far awayand Monte Cimone will help get there faster,” says Prof. Luca Benini, Full Professor of Electronics at DEI-UNIBO and Chair of Digital Circuits and Systems at ETH Zurich.

“As a supercomputing center, we are very interested in RISC-V technology to support the scientific community”, concludes Dr. Daniele Cesarini, HPC specialist at CINECA. “We are excited to contribute to the RISC-V ecosystem by supporting the installation and debugging of widely used scientific code and mathematical libraries to advance the development of high-performance RISC-V processors. We believe Monte Cimone will announce the next generation of supercomputers based on RISC-V technology and we will continue to work in synergy with E4 Computer Engineering and the University of Bologna to demonstrate that RISC-V is ready for the HPC giants”.

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